Tektronix Asia Spring Show 2008

As serial data rates continue to increase, engineers face growing challenges in selecting the best techniques to verify that their receiver circuits work under real world conditions. Test methodologies include adding transmission path imperfections to simulate worst case conditions. These methodologies include adding jitter and noise, inserting delays between data lines and adjusting amplitudes and pre-emphasis to digital patterns to simulate system artifacts caused by many variables surrounding the circuit or device under test. With fast digital to analog converters and faster sample clock capabilities, instruments such as Arbitrary Waveform Generators can be used to directly synthesize analog transmission line effects on serial data signals. Since testing requirements replicate real world transmission path effects, it only makes sense to generate signals that have these effects as part of the analog signal used for the test. This would eliminate the need to inject jitter and noise from other sources, remove the need for multi-channel added signals to create pre-emphasis and increase the capability to provide true transmission path artifacts such as ISI and other system anomalies. This session will demonstrate this Direct Synthesis approach to serial data receiver testing.

High speed serial data transmission has rapidly become a standard for the latest computer architectures. This is now used for memory (FB-DIMM), disk drives (SAS, SATA) and expansion cards (PCI Express), to name only a few. High speed serial data is also showing up in other applications such as the HDMI products for high definition TV. It will soon be hard to find a design that does not incorporate high speed serial links. Testing these serial data links poses many new test and compliance challenges, ranging from fixturing/probing issues associated with multi-GHz signals, to data and clock recovery and analysis. Compounding these challenges is the fact that most of the specifications for these standards are very dynamic, and spec changes often have an impact on the test tools that are used. This session will look at common test techniques for high speed serial links as well as some of the unique test techniques for specific technologies. Equipment selection will be discussed, focusing on the key parameters that help determine the optimal solution.

In this session, we'll look at key trends in the design of low speed serial buses, including RS-232, I2C, SPI, CAN, LIN and FlexRay design in the consumer electronics, industrial controls, medical equipment and automotive industries.  We will focus on some of the key technical challenges such as synchronizing the CAN nodes in the CAN network, simultaneously viewing the CAN/LIN protocol data from two segments of the network and characterizing the network. An overview of Tektronix' timing and protocol decoding software solution that helps address these challenges will be followed with a demonstration of some key measurements such as protocol decoding of traffic, oscillator tolerance, eye diagram analysis, and bus utilization.

As serial data rates continue to increase, engineers face growing challenges in selecting the best techniques to verify that their receiver circuits work under real world conditions. Test methodologies include adding transmission path imperfections to simulate worst case conditions. These methodologies include adding jitter and noise, inserting delays between data lines and adjusting amplitudes and pre-emphasis to digital patterns to simulate system artifacts caused by many variables surrounding the circuit or device under test. With fast digital to analog converters and faster sample clock capabilities, instruments such as Arbitrary Waveform Generators can be used to directly synthesize analog transmission line effects on serial data signals. Since testing requirements replicate real world transmission path effects, it only makes sense to generate signals that have these effects as part of the analog signal used for the test. This would eliminate the need to inject jitter and noise from other sources, remove the need for multi-channel added signals to create pre-emphasis and increase the capability to provide true transmission path artifacts such as ISI and other system anomalies. This session will demonstrate this Direct Synthesis approach to serial data receiver testing.

High speed serial data transmission has rapidly become a standard for the latest computer architectures. This is now used for memory (FB-DIMM), disk drives (SAS, SATA) and expansion cards (PCI Express), to name only a few. High speed serial data is also showing up in other applications such as the HDMI products for high definition TV. It will soon be hard to find a design that does not incorporate high speed serial links. Testing these serial data links poses many new test and compliance challenges, ranging from fixturing/probing issues associated with multi-GHz signals, to data and clock recovery and analysis. Compounding these challenges is the fact that most of the specifications for these standards are very dynamic, and spec changes often have an impact on the test tools that are used. This session will look at common test techniques for high speed serial links as well as some of the unique test techniques for specific technologies. Equipment selection will be discussed, focusing on the key parameters that help determine the optimal solution.

An interactive session with Tektronix' range of products.

In this session, we'll look at key trends in the design of low speed serial buses, including RS-232, I2C, SPI, CAN, LIN and FlexRay design in the consumer electronics, industrial controls, medical equipment and automotive industries.  We will focus on some of the key technical challenges such as synchronizing the CAN nodes in the CAN network, simultaneously viewing the CAN/LIN protocol data from two segments of the network and characterizing the network. An overview of Tektronix' timing and protocol decoding software solution that helps address these challenges will be followed with a demonstration of some key measurements such as protocol decoding of traffic, oscillator tolerance, eye diagram analysis, and bus utilization.

This hands-on workshop is specially designed for engineers and technicians who face increasingly complex and critical troubleshooting tasks in embedded design.

As serial data rates continue to increase, engineers face growing challenges in selecting the best techniques to verify that their receiver circuits work under real world conditions. Test methodologies include adding transmission path imperfections to simulate worst case conditions. These methodologies include adding jitter and noise, inserting delays between data lines and adjusting amplitudes and pre-emphasis to digital patterns to simulate system artifacts caused by many variables surrounding the circuit or device under test. With fast digital to analog converters and faster sample clock capabilities, instruments such as Arbitrary Waveform Generators can be used to directly synthesize analog transmission line effects on serial data signals. Since testing requirements replicate real world transmission path effects, it only makes sense to generate signals that have these effects as part of the analog signal used for the test. This would eliminate the need to inject jitter and noise from other sources, remove the need for multi-channel added signals to create pre-emphasis and increase the capability to provide true transmission path artifacts such as ISI and other system anomalies. This session will demonstrate this Direct Synthesis approach to serial data receiver testing.

High speed serial data transmission has rapidly become a standard for the latest computer architectures. This is now used for memory (FB-DIMM), disk drives (SAS, SATA) and expansion cards (PCI Express), to name only a few. High speed serial data is also showing up in other applications such as the HDMI products for high definition TV. It will soon be hard to find a design that does not incorporate high speed serial links. Testing these serial data links poses many new test and compliance challenges, ranging from fixturing/probing issues associated with multi-GHz signals, to data and clock recovery and analysis. Compounding these challenges is the fact that most of the specifications for these standards are very dynamic, and spec changes often have an impact on the test tools that are used. This session will look at common test techniques for high speed serial links as well as some of the unique test techniques for specific technologies. Equipment selection will be discussed, focusing on the key parameters that help determine the optimal solution.

In this session, we'll look at key trends in the design of low speed serial buses, including RS-232, I2C, SPI, CAN, LIN and FlexRay design in the consumer electronics, industrial controls, medical equipment and automotive industries.  We will focus on some of the key technical challenges such as synchronizing the CAN nodes in the CAN network, simultaneously viewing the CAN/LIN protocol data from two segments of the network and characterizing the network. An overview of Tektronix' timing and protocol decoding software solution that helps address these challenges will be followed with a demonstration of some key measurements such as protocol decoding of traffic, oscillator tolerance, eye diagram analysis, and bus utilization.

The display technologies in the consumer electronics industry are undergoing a digital performance revolution. The growth in plasma/LCD flat panel display sizes and pixel counts are driving the need for faster and more efficient bus technologies. HDMI and the emerging DisplayPort standards are capable of multi-gigabit serial transmission rates and require a disciplined approach to interoperability/compliance testing. This course will review the critical elements of the HDMI and DisplayPort PHY Layer test requirements. The course will also demonstrate proven test methods for validating HDMI v.1.3b and the latest DisplayPort standards at the PHY layer.

This session will look at common test techniques for high speed serial links, as well as some unique test techniques for specific technologies. Equipment selection will be discussed, focusing on the key parameters that help determine an optimal solution.The Tektronix Real-Time Spectrum Analyzer, combined with our Advance Signal Analysis software, now offers a comprehensive solution to radar pulse analysis in a single test instrument. The Real-Time Spectrum Analyzer’s extraordinary capabilities can also provide signal details that were previously out of reach with other test equipment. In this seminar, we will begin with a review of certain key radar system concepts associated with pulse design and diagnostics, followed by a look at the Real-Time Spectrum Analyzer and its unique capabilities. We will then look at techniques for reliably capturing and viewing radar signals.

This session will look at common test techniques for high speed serial links, as well as some unique test techniques for specific technologies. Equipment selection will be discussed, focusing on the key parameters that help determine an optimal solution.The Tektronix Real-Time Spectrum Analyzer, combined with our Advance Signal Analysis software, now offers a comprehensive solution to radar pulse analysis in a single test instrument. The Real-Time Spectrum Analyzer’s extraordinary capabilities can also provide signal details that were previously out of reach with other test equipment. In this seminar, we will begin with a review of certain key radar system concepts associated with pulse design and diagnostics, followed by a look at the Real-Time Spectrum Analyzer and its unique capabilities. We will then look at techniques for reliably capturing and viewing radar signals.

Monitoring and detecting sources of interference, either intentional or unintentional, is a daunting task. With the proliferation of wireless communication services and wireless device applications touching every aspect of modern society, the management and monitoring of your spectrum or facility has become increasingly important. Whether securing your facility or protecting your spectrum investment, you must ensure that interference is mitigated. The detection of low level and intermittent interference in the presence of larger signals is not possible with any certainty using most spectrum analyzer tools. Once detected, identifying, mapping and tracking down signals or sources of interference requires flexible and portable tools. With DPX® displaying Live RF, you will see signals you never knew existed! You will change the way you search for and discover elusive signals! Tektronix RTSA’s are the only spectrum analyzers with a 100% certainty of displaying and detecting a signal of interest in the frequency domain within the bandwidth and dynamic range of the analyzer.

This class will help you understanding more about potential signal quality issues inside the broadcast facility, such as A/V delay, jitter, cable length margin, etc. Finally, you will be introduced to some effective techniques in resolving those issues.

A fast, practical, repeatable and objective measurement alternative to subjective evaluation of picture quality will be introduced in this class. You will find it particularly useful if you are doing codec design, optimization and verification of your digital video equipment or system.

In this class, digital STB testing will be covered with live demonstration of some key tools in characterizing the digital devices. IP STB testing will be introduced as well.